Sections
  Home INESC TEC Patents Control module for multiple mixed-signal resources management
Document Actions

Control module for multiple mixed-signal resources management

Title
Control module for multiple mixed-signal resources management
Patent Number -
Patent Application Number PT107537; PCT/IB2015/052141
Priority Date 24-03-2014
Espacenet Link
(if available)
-
Inventors António José Salazar Escobar
José Alberto Peixoto Machado da Silva
Miguel Fernando Paiva Velhote Correia
Applicants INESC TEC
Abstract / Description The present solution targets independent or inter-dependent resource management scenarios such as multi-sensor and other scenarios of possible process/component sharing, intended for individual or group synchronized core task management as part of a flexible long-term solution for monitoring, self-calibration, built-in self-testing, measurements and/or group synchronization dependant strategies.
An extension to I2C compatible instruments is described. Disclosed is a module comprising an interpreter sub-module, for receiving and responding to I2C sequences and a register bank module comprising a plurality of registers for storing values.
The disclosed module and method of operation can be used for initialization, measurement, and resource management through mixed-signal analog bus scheduling, synchronization and group addressing for built-in calibration strategies for example.
Advantages and Innovation
  • I2C multiple core/instrument accessibility
  • Group awareness through architectural element awareness (mandatory registers, flags and counter) and methodology (instruction set and defined process flow).
  • I2C broadcast level addressability expansion as to permit token style shared resource management.

This solution offers a mixed-signal test and measurement infrastructure. Furthermore, it addresses the specificities of continuous long term sensor based monitoring solutions
Technical Specification or Expertise Sought Expertise in embedded systems design / semiconductor engineering / SoC design / VLSI design / multiple wearable sensing/control
Stage of Development
Experimental prototype:
  • FPGA-based implementation of multiple modules and a I2C arbitrer module with external access to internal registers, counters and flags through a USB connection and custom GUI. A Usbee ZX module was utilized as a I2C bus master
  • Verilog of I2C with SCPS expansion tested through external I2C and visualized internal registers
Desired Business Relationship
  • Licensing collaboration
  • Major consortia projects
  • Research & Development collaboration
anunciobip-en

 

 


 

anuncio-workwithus

 

 


 

Anuncio INESC P&D Brasil

 

 


 

anuncioeen-en

 

 


 

Anuncio Connect

 

 


 

anunciosmartgrids